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About the E7T-DBoard


E7T and Daughter BoardThe E7T-DBoard is a daughter board for ARM's Evaluator-7T board. Together the Evaluator-7T and the E7T-DBoard form a powerful development system for the design of hardware VHDL/Verilog cores and embedded software.

The Evaluator-7T board is a simple ARM platform that includeds a minimal set of core facilities. The microcontroller used is a Samsung KS32C50100 (renamed to S3C4510B), which is based on an ARM7TDMI processor core and contains useful peripherals including two UARTs and an ethernet controller. Visit the S3C4510B section of Samsung's web site for more details of this microcontroller and the Evaluator-7T section of ARM's website for more details of the Evaluator-7T board.


The E7T-DBoard and Evaluator-7T boards can be used together for:

  • SoC Development
  • ASIC / FPGA Core development
  • Embedded software development

Features of the development system:

  • Cost effective and compact development platform
  • Ideal for teaching / student project work
  • Free embedded software development toolchain (based around GNU tools)
  • Free bootstrap program for embedded systems (RedBoot)
  • Free real-time, embedded operating system (eCos - the Embedded Configurable Operating System)
  • Free VHDL / Verilog hardware development toolchain (available from the Xilinx website)

The E7T-DBoard Reference Manual is available from our Downloads page.

Note: Sweeney Design does not supply ARM's Evaluator-7T board, this can be ordered online, directly from ARM.


E7T-DBoard Kit Contents:


   1 x E7T-DBoard

   4 x AMP 104655-6 connectors (for fitting to Evaluator-7T board)

   1 x Null modem serial cable

   1 x E7T-DBoard Support CD - Containing:

         E7T-DBoard Documentation:
           Schematic diagrams (PDF format)
           Reference manual (PDF format)
         eCos Repository snapshot with:
             -  All required E7T-DBoard updates added
             -  Lightweight TCP/IP Stack (lwIP) included
         .ecm files for various RedBoot and eCos configurations
         Various Pre-built Redboot Images
         Example eCos Applications (source and pre-built versions):
         Pre-built E7T-DBoard Support FPGA Image and documenation:
           Adds a StdUart core (16x550 compatible UART) to the E7T-DBoard.
           Adds a Watchdog core (Watchdog Timer) to the E7T-DBoard.
         VHDL Files:
           Blank VHDL entity + architecture file for E7T-DBoard
           ucf constraints file with fixed pin locations for E7T-DBoard


E7T-DBoard Kit Price:


E7T-DBoard Kit


   Price does not include delivery (Please email for UK / international delivery rates)
   Price does not include VAT @ 17.5% where applicable.
   All prices are in UK £.
   The lite-build version of the board is no longer available.

Email e7tdboard@sweeneydesign.co.uk for availability, ordering and payment details for the E7T-DBoard (please specify quantities required).


E7T-DBoard Features:


   Intel LXT972A Ethernet PHY + RJ45 Connector


   Xilinx Spartan2 FPGA + JTAG Connector

   RS232 Transceiver + Serial Socket Connector

   Expansion Bus

Intel LXT972A Ethernet PHY + RJ45 Connector

Connects to the ethernet controller on the Evaluator-7T board to allow fast software download / debugging. Or may alternatively be connected to the FPGA to allow an ethernet controller to be developed.


The standard 512KB of SRAM on the Evaluator-7T board is a little restrictive for software use in development, so 32MB of SDRAM has been included. The FPGA may also control this SDRAM allowing a SDRAM controller core to be developed.

Xilinx Spartan2 FPGA + JTAG Connector

A Xilinx XC2S200-6 FPGA for development of ASIC / FPGA cores (See the Spartan2 section of Xilinx's website for more details). The JTAG connector may be used to download an FPGA image directly to the FPGA using a standard Xilinx cable, which will remain until the board power is removed. Alternatively, the FPGA image (optionally compressed) may be downloaded (via a serial connection) to the FLASH on the Evaluator-7T board where is will be used by the Redboot bootstrap firmware to configure the FPGA each time the board is power cycled.

If the FPGA is not being used for the development of ASIC / FPGA cores, a pre-built support FPGA image is provided which adds an extra UART and a watchdog timer to the E7T-DBoard. See the downloads page for details of the E7T-DBoard support FPGA image.

RS232 Transceiver + Serial Socket Connector

This is simply connected to the FPGA allowing a UART core to be developed.

Expansion Bus

3 x 34way 0.1" connectors form the expansion bus. These connectors contain power and the FPGA I/O signals to allow further functionality to be added to the development platform. For example, if a USB controller core were to be developed, a small board containing a USB transceiver and a connector could be constructed and plugged into one of these connectors.


E7T Development System Block Diagram


E7T Development System Block Diagram



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