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This section contains downloads for the E7T Development Platform. Documentation
Xilinx Parallel/JTAG Download CableThis document contains a schematic diagram, bill of materials and stripboard layout for a download cable circuit, suitable for configuring the FPGA on the E7T-DBoard via the JTAG interface.
RedBoot Images for plain Evaluator-7T BoardThe table below has links to two pre-built RedBoot images for the Evaluator-7T WITHOUT the E7T-DBoard fitted. These images are supplied to allow Evaluator-7T owners to use RedBoot with FLASH support (the standard RedBoot image for the Evaluator-7T does not contain FLASH support). The RedBoot image to be used depends on which type of FLASH device the Evaluator-7T has been fitted with. Note that the RedBoot images are larger than 64KB and the directions in the 'Instructions for writing a RedBoot image to FLASH' section of the E7T-DBoard Reference Manual should be followed to install RedBoot onto the Evaluator-7T board. These RedBoot images were built 05-Dec-2003 using an unmodified up-to-date eCos repository. Also included are the .ecm files (eCos Minimal Configuration file) for each image. These may be used to re-build the images from an eCos repository.
Redboot Images for Evaluator-7T with E7T-DBoard FittedAll RedBoot images built 08-Jun-2004 using up-to-date eCos repository snapshot with the two eCos repository updates below applied. The table below has links to various pre-built and tested RedBoot images in order to simplify testing of the E7T-DBoard once it has been fitted to the Evaluator-7T board. All the images are configured to run from FLASH using only the SRAM on the Evaluator-7T board and should be written to FLASH (address 0x01820000 onwards) following the instructions in the E7T-DBoard Reference Manual. These images have support for multiple RAM areas, so RedBoot is now aware of both the SRAM and the SDRAM. Also included are .ecm files (eCos Minimal Configuration file) for each image. These may be used to re-build the images from an eCos repository (with the E7T-DBoard updates applied). Note: The results may be unpredictable if any of these RedBoot
images are used with an Evaluator-7T board without an E7T-DBoard fitted.
.bin sizeThis is the size of the .bin file before it is UU encoded, and is the amount of space the RedBoot image will occupy once it has been written to the FLASH. E7T-DBoard SupportedThis RedBoot image sets up the microcontroller to access the E7T-DBoard's 32MB of SDRAM and sets up is the microprocessor interface to the FPGA. This RedBoot image supports the download and debugging of software applications running in either the Evaluator-7T's SRAM or the E7T-DBoard's SDRAM. FIS SupportedThis RedBoot image has the FLASH driver and the FIS (FLASH Image System) included. This RedBoot image can write to the FLASH to store files using its FIS, and can use the FLASH to store configuration data and boot-time scripts. fpgaload SupportedThis RedBoot image has the 'fpgaload' command included and is therefore capable of configuring the FPGA on the E7T-DBoard. By setting up a RedBoot boot script with the 'fpgaload' command included, it is possible to automatically configure the FPGA each time the board is booted. Ethernet EnabledThis RedBoot image has ethernet support included. All network details, including MAC address, can be set-up and stored in FLASH using RedBoot's 'fconfig' command - See the E7T-DBoard Reference manual for more details. E7T-DBoard Support FPGA ImageThe E7T-DBoard Support FPGA Image is a pre-built FPGA image containing a UART and a Watchdog Timer. This image is supplied so that engineers that are not using the FPGA for development may still make use of it.
It is recommended that the gzipped version of the FPGA image is stored in the Evaluator's FLASH and used to configure the FPGA at boot time using a boot script with RedBoot. See the E7T-DBoard reference manual for details of using the FPGA image. For details of using the UART and Watchdog Timer with your software once the FPGA has been configured, see the datasheets above. eCos repository UpdatesThe following updates are available below to be applied to your local eCos CVS repository.
The updates are made up of a combination of patch files (.pat) and tar files (.tar), both of which need to be applied to the repository when present. To apply a patch file, example.pat, to the CVS repository:
To apply a tar file, example.tar, to the CVS repository:
E7T-DBoard SDRAM and FPGA access supportNew version created 09-Oct-2003 The following files contain updates for the eCos repository that enables eCos to use either the Evaluator-7T's SRAM or the E7T-DBoard's SDRAM (selectable with a new configuration option) and enables the microcontroller interface to the FPGA. This version of the update is controlled by a CDL option, which controls whether the E7T-DBoard updates are included or not. If they are not included, the eCos code behaves exactly like the plain E7T port.
The patch file patches the following files in the eCos repository.
The tar file creates the following new files in the eCos repository.
E7T-DBoard FPGA configuration supportCreated 09-Oct-2003. The following file is an .epk file (eCos distribution package) that adds the 'fpgaload' command to RedBoot.
This package should be added to your eCos repository using eCos' Package Administration Tool. Then the package 'fpgaload' can be added to your RedBoot build.
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© 2004 Sweeney Design Ltd
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